PI6C2516 outputs
phase-locked loop clock driver with 16 clock outputs.phase-locked loop clock driver with 16 clock outputs.
High Performance Phase-Locked Loop Clock Distribution for Synchronous DRAM, server and networking applications. Zero Input-to-Output delay: Distribute One Clock Input.
Zero Input-to-Output delay: Distribute One Clock Input to four banks of four outputs, with separate output enables fo.
The PI6C2516 family is a low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high-frequency clock signals for SDRAM, server and networking applications. By connecting the feedback FB_OUT output to the feedback FB_IN input, the pr.
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